In recent years, a stacked semiconductor memory device has been proposed in which memory cells are integrated three-dimensionally. For such a stacked semiconductor memory device, investigations are being performed to realize even more downsizing by providing a thick insulating film between the semiconductor substrate and the memory cells and by forming a control circuit inside the insulating film and the upper layer portion of the semiconductor substrate. In such a case, a conductive film is provided on the insulating film and used as a source line.